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USER GUIDE / PERIPHERALS / GPIO / GPIO PORT SUMMARY
GPIO 端口汇总
GPIO
GPIO 实现了可编程驱动强度、施密特触发和弱上拉/下拉电阻功能。
每个 PAD 可配置为四个模块功能。
表 1 GPIO 端口汇总表说明
| PAD_ID | PULL_RST | DS_RST | FUNC0 | FUNC1 | FUNC2 | FUNC3 |
|---|---|---|---|---|---|---|
| PA00 | HIZ | 2pf | sd0(io-0) | msc0_d0(io-0) | (i-0) | (i-0) |
| PA01 | PU | 4pf | sd2(io-0) | msc0_d1(io-0) | ssi0_dt(io-0) | sfc_dt(io-0) |
| PA02 | PD | 8pf | sd2(io-0) | msc0_d2(io-0) | ssi0_dr(io-0) | sfc_dr(io-0) |
| Group number | Pad pull enable active value. 00: HIZ 01: pull-up 10: pull-down 11:illegal state | Pad Drive Strength control: 00:2pf 01:4pf 10:8pf 11: 16pf | In table, each function column will expression one module port using relationship. such as the pad PA00, the FUNC0 "sd0_(io-0)", "sd0" means the NEMC module data port 0, "io" means function as I/O, "0" means when configure as other functions, GPIO supply value 0 to this function port. | |||
备注：
功能“PULL_RST”表示复位后，Pad 默认具有上拉或下拉功能。
功能“DS_RST”表示复位后，PAD 默认具有的驱动强度，当 PAD 工作在 100Mhz/3.3V 时，负载 2pf 对应的电流为 2mA。
GPIO Port A
7.1.3.1 GPIO Port A
表 2 GPIO Port A 摘要
| PAD_ID | PULL_RST | DRV_RST | FUNCTION0 | FUNCTION1 | FUNCTION2 | FUNCTION3 |
|---|---|---|---|---|---|---|
| PA00 | HIZ | 10mA | lcd_slcd_d6_o(o) | tpc_d15_o(o) | nemc_ad0(io-0) | uart7_txd_o(o) |
| PA01 | HIZ | 10mA | lcd_slcd_d7_o(o) | tpc_d14_o(o) | nemc_ad1(io-0) | uart7_rxd_i(i-0) |
| PA02 | HIZ | 10mA | lcd_slcd_d8_o(o) | tpc_d13_o(o) | nemc_ad2(io-0) | cim1_d0_i(i-0) |
| PA03 | HIZ | 10mA | lcd_slcd_d9_o(o) | tpc_d12_o(o) | nemc_ad3(io-0) | cim1_d1_i(i-0) |
| PA04 | HIZ | 10mA | lcd_slcd_d10_o(o) | tpc_d11_o(o) | nemc_ad4(io-0) | cim1_d2_i(i-0) |
| PA05 | HIZ | 10mA | lcd_slcd_d11_o(o) | tpc_d10_o(o) | nemc_ad5(io-0) | cim1_d3_i(i-0) |
| PA06 | HIZ | 10mA | lcd_slcd_d12_o(o) | tpc_d9_o(o) | nemc_ad6(io-0) | cim1_d4_i(i-0) |
| PA07 | HIZ | 10mA | lcd_slcd_d13_o(o) | tpc_d8_o(o) | nemc_ad7(io-0) | cim1_d5_i(i-0) |
| PA08 | HIZ | 10mA | lcd_slcd_d14_o(o) | tpc_d7_o(o) | nemc_cs_o(o) | cim1_d6_i(i-0) |
| PA09 | HIZ | 10mA | lcd_slcd_d15_o(o) | tpc_d6_o(o) | nemc_avd_o(o) | cim1_d7_i(i-0) |
| PA10 | HIZ | 10mA | lcd_d16_o(o) | tpc_d5_o(o) | nemc_rd_o(o) | cim1_mclk_o(o) |
| PA11 | HIZ | 10mA | lcd_d17_o(o) | tpc_d4_o(o) | nemc_we_o(o) | cim1_pclk_i(i-0) |
| PA12 | HIZ | 10mA | lcd_d18_o(o) | tpc_d3_o(o) | nemc_wait_i(i-0) | cim1_hsync_i(i-0) |
| PA13 | HIZ | 10mA | lcd_d19_o(o) | tpc_d2_o(o) | nemc_ad8(io-0) | cim1_vsync_i(i-0) |
| PA14 | HIZ | 10mA | lcd_d20_o(o) | tpc_d1_o(o) | nemc_ad9(io-0) | i2c2_sda(io-1) |
| PA15 | HIZ | 10mA | lcd_d21_o(o) | tpc_d0_o(o) | nemc_ad10(io-0) | i2c2_sck(io-1) |
| PA16 | HIZ | 10mA | lcd_d22_o(o) | tpc_clk_o(o) | nemc_ad11(io-0) | uart4_txd_o(o) |
| PA17 | HIZ | 10mA | lcd_d23_o(o) | tpc_latch_o(o) | nemc_ad12(io-0) | uart4_rxd_i(i-0) |
| PA18 | HIZ | 10mA | lcd_pclk_slcd_ce_o(o) | tpc_sm0_o(o) | nemc_ad13(io-0) | pwm_trig0_o(o) |
| PA19 | HIZ | 10mA | lcd_vsync_slcd_dc_o(o) | tpc_sm1_o(o) | nemc_ad14(io-0) | pwm_trig1_o(o) |
| PA20 | HIZ | 10mA | lcd_hsync_slcd_wr_o(o) | tpc_sm2_o(o) | nemc_ad15(io-0) | pwm_trig2_o(o) |
| PA21 | HIZ | 10mA | lcd_de_o(o) | tpc_sm3_o(o) | slcd_te_i(i-0) | pwm_trig3_o(o) |
| PA22 | HIZ | 10mA | mac_phy_clk_o(o) | uart3_rts_o(o) | spi1_slv_clk_i(i-0) | (i-0) |
| PA23 | HIZ | 10mA | mac_ref_clk_i(i-0) | msc1_clk_o(o) | pwm2_o(o) | (i-0) |
| PA24 | HIZ | 10mA | mac_txd0_o(o) | msc1_cmd(io-0) | pwm3_o(o) | (i-0) |
| PA25 | HIZ | 10mA | mac_txd1_o(o) | msc1_d0(io-1) | pwm4_o(o) | (i-0) |
| PA26 | HIZ | 10mA | mac_txen_o(o) | msc1_d1(io-1) | pwm5_o(o) | (i-0) |
| PA27 | HIZ | 10mA | mac_rxd0_i(i-0) | msc1_d2(io-1) | pwm0_o(o) | (i-0) |
| PA28 | HIZ | 10mA | mac_rxd1_i(i-0) | msc1_d3(io-1) | pwm1_o(o) | (i-0) |
| PA29 | HIZ | 10mA | mac_crs_dv_i(i-0) | uart3_txd_o(o) | spi1_slv_cs_i(i-0) | (i-0) |
| PA30 | HIZ | 10mA | mac_mdc_o(o) | uart3_cts_i(i-0) | spi1_slv_dr_i(i-0) | (i-0) |
| PA31 | HIZ | 10mA | mac_mdio(io-0) | uart3_rxd_i(i-0) | spi1_slv_dt_o(o) | (i-0) |
GPIO Port B
7.1.3.2 GPIO Port B
表 3 GPIO Port B 摘要
| PAD_ID | PULL_RST | DRV_RST | FUNCTION0 | FUNCTION1 | FUNCTION2 | FUNCTION3 |
|---|---|---|---|---|---|---|
| PB00 | PU | 10mA | sfc_clk_o(o) | msc0_d3(io-1) | pwm7_o(o) | uart6_rxd_i(i-0) |
| PB01 | PU | 10mA | sfc_ce_o(o) | msc0_d1(io-1) | uart2_cts_i(i-0) | (i-0) |
| PB02 | PU | 10mA | sfc_d0_dt(io-0) | msc0_cmd(io-0) | uart2_txd_o(o) | (i-0) |
| PB03 | PU | 10mA | sfc_d1_dr(io-0) | msc0_d0(io-1) | uart2_rts_o(o) | (i-0) |
| PB04 | PU | 10mA | sfc_d2_wp(io-0) | msc0_clk_o(o) | uart2_rxd_i(i-0) | (i-0) |
| PB05 | PU | 10mA | sfc_d3_hold(io-0) | msc0_d2(io-1) | pwm6_o(o) | uart6_txd_o(o) |
| PB06 | PU | 10mA | (i-0) | (i-0) | (i-0) | (i-0) |
| PB07 | PD | 10mA | (i-0) | (i-0) | (i-0) | (i-0) |
| PB08 | HIZ | 10mA | msc0_clk_o(o) | uart2_cts_i(i-0) | pwm7_o(o) | i2s_blck(io-0) |
| PB09 | HIZ | 10mA | msc0_cmd(io-0) | uart2_rts_o(o) | pwm6_o(o) | i2s_mclk_o(o) |
| PB10 | HIZ | 10mA | msc0_d0(io-1) | uart5_txd_o(o) | pwm8_o(o) | i2s_lrck(io-0) |
| PB11 | HIZ | 10mA | msc0_d1(io-1) | uart5_rxd_i(i-0) | pwm9_o(o) | i2s_do_o(o) |
| PB12 | HIZ | 10mA | msc0_d2(io-1) | uart2_txd_o(o) | pwm4_o(o) | i2s_di_i(i-0) |
| PB13 | HIZ | 10mA | msc0_d3(io-1) | uart2_rxd_i(i-0) | pwm5_o(o) | (i-0) |
| PB14 | HIZ | 10mA | uart7_txd_o(o) | i2c1_sda(io-1) | pwm_stop0_i(i-0) | (i-0) |
| PB15 | HIZ | 10mA | uart7_rxd_i(i-0) | i2c1_sck(io-1) | pwm_stop1_i(i-1) | (i-0) |
| PB16 | HIZ | 10mA | cim0_d0_i(i-0) | spi1_dr_i(i-0) | pwm0_o(o) | can0_tx_o(o) |
| PB17 | HIZ | 10mA | cim0_d1_i(i-0) | spi1_dt_o(o) | pwm1_o(o) | can0_rx_i(i-0) |
| PB18 | HIZ | 10mA | cim0_d2_i(i-0) | spi1_cs_o(o) | pwm2_o(o) | can1_tx_o(o) |
| PB19 | HIZ | 10mA | cim0_d3_i(i-0) | spi1_clk_o(o) | pwm3_o(o) | can1_rx_i(i-0) |
| PB20 | HIZ | 10mA | cim0_mclk_o(o) | (i-0) | pwm4_o(o) | (i-0) |
| PB21 | HIZ | 10mA | cim0_pclk_i(i-0) | msc1_clk_o(o) | pwm13_o(o) | uart2_txd_o(o) |
| PB22 | HIZ | 10mA | cim0_hsync_i(i-0) | msc1_cmd(io-0) | pwm12_o(o) | uart2_rxd_i(i-0) |
| PB23 | HIZ | 10mA | cim0_vsync_i(i-0) | msc1_d0(io-1) | pwm14_o(o) | uart6_txd_o(o) |
| PB24 | HIZ | 10mA | i2c1_sda(io-1) | msc1_d3(io-1) | pwm11_o(o) | uart2_rts_o(o) |
| PB25 | HIZ | 10mA | i2c1_sck(io-1) | msc1_d2(io-1) | pwm10_o(o) | uart2_cts_i(i-0) |
| PB26 | HIZ | 10mA | uart4_rxd_i(i-0) | msc1_d1(io-1) | pwm15_o(o) | uart6_rxd_i(i-0) |
| PB27 | HIZ | 10mA | uart4_txd_o(o) | pwma_o(o) | pwm5_o(o) | (i-0) |
| PB28 | ----- | ----- | ----- | ----- | ----- | ----- |
| PB29 | ----- | ----- | ----- | ----- | ----- | ----- |
| PB30 | ----- | ----- | ----- | ----- | ----- | ----- |
| PB31 | ----- | ----- | ----- | ----- | ----- | ----- |
GPIO Port C
7.1.3.3 GPIO Port C
表 4 GPIO Port C 摘要
| PAD_ID | PULL_RST | DRV_RST | FUNCTION0 | FUNCTION1 | FUNCTION2 | FUNCTION3 |
|---|---|---|---|---|---|---|
| PC00 | HIZ | 10mA | adc0_i(i-0) | spi1_clk_o(o) | tcu0_i(i-0) | uart3_txd_o(o) |
| PC01 | HIZ | 10mA | adc1_i(i-0) | spi1_cs_o(o) | tcu1_i(i-0) | uart3_rxd_i(i-0) |
| PC02 | HIZ | 10mA | adc2_i(i-0) | spi1_dt_o(o) | tcu2_i(i-0) | uart3_rts_o(o) |
| PC03 | HIZ | 10mA | adc3_i(i-0) | spi1_dr_i(i-0) | tcu3_i(i-0) | uart3_cts_i(i-0) |
| PC04 | HIZ | 10mA | adc4_i(i-0) | spi1_slv_clk_i(i-0) | i2s_mclk_o(o) | can0_tx_o(o) |
| PC05 | HIZ | 10mA | adc5_i(i-0) | spi1_slv_cs_i(i-0) | i2s_lrck(io-0) | can0_rx_i(i-0) |
| PC06 | HIZ | 10mA | adc6_i(i-0) | spi1_slv_dt_o(o) | i2s_blck(io-0) | can1_tx_o(o) |
| PC07 | HIZ | 10mA | adc7_i(i-0) | spi1_slv_dr_i(i-0) | i2s_do_o(o) | can1_rx_i(i-0) |
| PC08 | HIZ | 10mA | adc8_i(i-0) | tpc_sm4_o(o) | i2s_di_i(i-0) | (i-0) |
| PC09 | HIZ | 10mA | adc9_i(i-0) | tpc_sm5_o(o) | tcu4_i(i-0) | msc1_d1(io-1) |
| PC10 | HIZ | 10mA | adc10_i(i-0) | tpc_sm6_o(o) | tcu5_i(i-0) | msc1_d0(io-1) |
| PC11 | HIZ | 10mA | adc11_i(i-0) | tpc_sm7_o(o) | tcu6_i(i-0) | msc1_clk_o(o) |
| PC12 | HIZ | 10mA | adc12_i(i-0) | tpc_dst0_o(o) | tcu7_i(i-0) | msc1_cmd(io-0) |
| PC13 | HIZ | 10mA | adc13_i(i-0) | tpc_dst1_o(o) | i2c2_sda(io-1) | msc1_d3(io-1) |
| PC14 | HIZ | 10mA | adc14_i(i-0) | tpc_dst2_o(o) | i2c2_sck(io-1) | msc1_d2(io-1) |
| PC15 | HIZ | 10mA | adc15_i(i-0) | tpc_dst3_o(o) | pwma_o(o) | (i-0) |
GPIO Port D
7.1.3.4 GPIO Port D
表 5 GPIO Port D 摘要
| PAD_ID | PULL_RST | DRV_RST | FUNCTION0 | FUNCTION1 | FUNCTION2 | FUNCTION3 |
|---|---|---|---|---|---|---|
| PD00 | HIZ | 10mA | spi0_clk_o(o) | uart1_txd_o(o) | (i-0) | (i-0) |
| PD01 | HIZ | 10mA | spi0_cs_o(o) | uart1_rxd_i(i-0) | (i-0) | (i-0) |
| PD02 | HIZ | 10mA | spi0_dt_o(o) | uart1_rts_o(o) | spi0_slv_d3(io-0) | i2c0_sda(io-1) |
| PD03 | HIZ | 10mA | spi0_dr_i(i-0) | uart1_cts_i(i-0) | spi0_slv_d2(io-0) | i2c0_sck(io-1) |
| PD04 | HIZ | 10mA | uart1_rts_o(o) | i2c0_sda(io-1) | spi0_slv_clk_i(i-0) | (i-0) |
| PD05 | HIZ | 10mA | uart1_cts_i(i-0) | i2c0_sck(io-1) | spi0_slv_cs_i(i-0) | (i-0) |
| PD06 | HIZ | 10mA | uart1_rxd_i(i-0) | tdo_o(o) | spi0_slv_d1(io-0) | (i-0) |
| PD07 | HIZ | 10mA | uart1_txd_o(o) | tdi_i(i-0) | spi0_slv_d0(io-0) | (i-0) |
| PD08 | HIZ | 10mA | uart0_rxd_i(i-0) | tms(io-0) | (i-0) | (i-0) |
| PD09 | HIZ | 10mA | uart0_txd_o(o) | tck_i(i-0) | (i-0) | (i-0) |
GPIO Port E
7.1.3.5 GPIO Port E
表 6 GPIO Port E 摘要
| PAD_ID | PULL_RST | DRV_RST | FUNCTION0 | FUNCTION1 | FUNCTION2 | FUNCTION3 |
|---|---|---|---|---|---|---|
| PE00 | HIZ | 10mA | psram_rst_o(o) | psram_rst_o(o) | (i-0) | (i-0) |
| PE01 | HIZ | 10mA | psram_dqs0(io-0) | (i-0) | (i-0) | (i-0) |
| PE02 | HIZ | 10mA | psram_dqs1(io-0) | psram_dq5(io-0) | (i-0) | (i-0) |
| PE03 | PU | 10mA | psram_ce_o(o) | psram_ce_o(o) | (i-0) | (i-0) |
| PE04 | PD | 10mA | psram_clkp_o(o) | psram_clkp_o(o) | (i-0) | (i-0) |
| PE05 | PU | 10mA | psram_clkn_o(o) | psram_clkn_o(o) | (i-0) | (i-0) |
| PE06 | HIZ | 10mA | psram_dq0(io-0) | psram_dm0_o(o) | (i-0) | (i-0) |
| PE07 | HIZ | 10mA | psram_dq1(io-0) | psram_dq0(io-0) | (i-0) | (i-0) |
| PE08 | HIZ | 10mA | psram_dq2(io-0) | psram_dq1(io-0) | (i-0) | (i-0) |
| PE09 | HIZ | 10mA | psram_dq3(io-0) | psram_dq2(io-0) | (i-0) | (i-0) |
| PE10 | HIZ | 10mA | psram_dq4(io-0) | psram_dq3(io-0) | (i-0) | (i-0) |
| PE11 | HIZ | 10mA | psram_dq5(io-0) | (i-0) | (i-0) | (i-0) |
| PE12 | HIZ | 10mA | psram_dq6(io-0) | (i-0) | (i-0) | (i-0) |
| PE13 | HIZ | 10mA | psram_dq7(io-0) | (i-0) | (i-0) | (i-0) |
| PE14 | HIZ | 10mA | psram_dq8(io-0) | psram_dq6(io-0) | (i-0) | (i-0) |
| PE15 | HIZ | 10mA | psram_dq9(io-0) | psram_dq7(io-0) | (i-0) | (i-0) |
| PE16 | HIZ | 10mA | psram_dq10(io-0) | psram_dqs0(io-0) | (i-0) | (i-0) |
| PE17 | HIZ | 10mA | psram_dq11(io-0) | sfc_d0_dt(io-0) | (i-0) | (i-0) |
| PE18 | HIZ | 10mA | psram_dq12(io-0) | sfc_clk_o(o) | (i-0) | (i-0) |
| PE19 | HIZ | 10mA | psram_dq13(io-0) | sfc_d3_hold(io-0) | (i-0) | (i-0) |
| PE20 | HIZ | 10mA | psram_dq14(io-0) | sfc_d2_wp(io-0) | (i-0) | (i-0) |
| PE21 | HIZ | 10mA | psram_dq15(io-0) | sfc_d1_dr(io-0) | (i-0) | (i-0) |
| PE22 | PU | 10mA | psram_ce_o(o) | psram_dq4(io-0) | (i-0) | (i-0) |
| PE23 | PU | 10mA | psram_dqs1(io-0) | sfc_ce_o(o) | (i-0) | (i-0) |
备注
1. PB06 在启动时用作 BOOT_SEL0 输入，默认 PU。
2. PB07 在启动时用作 BOOT_SEL1 输入，默认 PD。