USER GUIDE / IMAGE INPUT & ENCODING / IPU / REGISTER LIST

寄存器列表

寄存器内存图

表 1 寄存器内存映射表基址
名称基地说明
IPU0x13320000IPU 的基地址

IPU 由一组寄存器控制,应用程序在每次操作前都要对这些寄存器进行配置。下表列出了所有寄存器。

表 2 IPU 寄存器映射表
名称RW复位值偏移地址访问大小
IPU_FM_CONTROLRW0x0000_00010x000032
IPU_STATUSRW0x8001_00010x000432
D_FMTRW0x0000_00000x000832
Y_ADDRRW0x0000_00000x000C32
UV_ADDRRW0x0000_00000x001032
IN_FM_GSRW0x0000_00000x001832
Y_STRIDERW0x0000_00000x001C32
UV_STRIDERW0x0000_00000x002032
OUT_ADDRRW0x0000_00000x002432
OUT_STRIDE*RW0x0000_00000x002C32
OUT_V_ADDRRW0x0000_00000x003032
OUT_V_STRIDERW0x0000_00000x003432
IPU_REG_CTRLRW0x0000_00000x006432
IPU_TRIGGERRW0x0000_00000x007432
GLB_CTRLRW0x0000_00000x007C32
UV_OUT_ADDRRW0x0000_00000x00B432
UV_OUT_STRIDERW0x0000_00000x00B832
OSD_IN_CH0_Y_ADDRRW0x0000_00000x00BC32
OSD_IN_CH0_Y_STRIDERW0x0000_00000x00C032
OSD_IN_CH0_UV_ADDRRW0x0000_00000x00C432
OSD_IN_CH0_UV_STRIDERW0x0000_00000x00C832
OSD_CH0_GSRW0x0000_00000x00FC32
OSD_CH0_POSRW0x0000_00000x010C32
OSD_CH0_PARARW0x0000_00000x011C32
OSD_CH_BK_PARARW0x0000_10000x012C32
OSD_CH0_BAK_ARGBRW0x0000_00000x013032
OSD_CH_B_BAK_ARGBRW0x0000_00000x014032
CH0_CSC_C0_COEFRW0x0000_00000x014832
CH0_CSC_C1_COEFRW0x0000_00000x014C32
CH0_CSC_C2_COEFRW0x0000_00000x015032
CH0_CSC_C3_COEFRW0x0000_00000x015432
CH0_CSC_C4_COEFRW0x0000_00000x015832
CH0_CSC_OFSET_PARARW0x0000_00000x015C32
RD_ARB_CTLRW0x0000_00100x01A832
CYC_NUM_ONE_FRAR0x0000_00000x01AC32
OSD_LAY_PADDING_ARGBRW0x0000_00000x01B032
DEBUG_INFO_SIGNALSR0x0000_00000x01B432
Y_ADDR_PPRW0x0000_00000x01C032
UV_ADDR_PPRW0x0000_00000x01C432
OSD_IN_CH0_Y_ADDR_PPRW0x0000_00000x01C832
OSD_IN_CH0_UV_ADDR_PPRW0x0000_00000x01CC32
BUFF_STATERW0x0000_00000x01D032
2BIT_BIT_1*RW0xFFFF_FFFF0x1F432
2BIT_BIT_0*RW0x0000_00000x1F832
2BIT_MASK*RW0x0000_00000x1FC32

注:带 * 的 4 个寄存器(OUT_STRIDE 0x002C、2BIT_BIT_1 0x1F4、2BIT_BIT_0 0x1F8、2BIT_MASK 0x1FC)在本页表 2 中未列出,表中信息取自手册 14.3.6.2 节对应的寄存器小节。